科技職缺

On-siteNorth AmericaFull-timePrincipal

Principal Silicon Design Verification Engineer

United States

Principal-level silicon design verification engineer at Microsoft owning pre-silicon verification of security IP blocks for Azure Cobalt chips, building C/C++ test content and SystemVerilog/UVM testbenches at subsystem and SoC levels.

assembly automation azure cloud cpp +7 skills

142 800 – 274 800 $

Tenstorrent

ai networking pcie qos systemverilog +1 skills

(India) System IP Design Engineer

APACFull-time

India

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…

Apple

automation cpp design-patterns express perl +6 skills

GPU Internships - Design Verification and Emulation & Driver Live

UKInternshipIntern

United Kingdom

Internship on Apple's UK GPU team contributing to verification and emulation of GPU IPs for Apple Silicon SoCs. Work involves verification plans, testbench development in SystemVerilog/C++, running intensive graphics workloads on emulation platforms, debugging, and scripting — with mentorship from GPU architects and designers across London, St Albans, or Cambridge.

Apple

cpp express perl python ruby +4 skills

GPU Internships - RTL Design, RTL Power Optimisation & Physical Design

UKInternshipIntern

United Kingdom

Apple UK GPU team internship working on RTL design, RTL power optimisation, and physical design for Apple Silicon GPU SoCs. Interns collaborate with design, verification, architecture, and PD engineers using languages like SystemVerilog, Verilog, VHDL, C/C++, and Python/Perl/Ruby.

HAYS Working for your Tomorrow

FPGA Engineer - Empresa multinacional ubicada en Barcelona

HybridEurope

Spain

Desde Hays estamos colaborando con una multinacional estadounidense líder en soluciones de medida, test, validación y simulación electrónica. La compañía ayuda a empresas tecnológicas a desarrollar tecnologías…

fpga git systemverilog

Google

ai cloud gcp machine-learning networking +2 skills

Senior ASIC Design Verification Engineer, Cloud

North AmericaSenior

United States

Senior ASIC design verification engineer at Google working on TPU (Tensor Processing Unit) hardware that accelerates AI/ML workloads in data centers. Day-to-day work involves planning verification of complex digital blocks, building SystemVerilog/UVM constrained-random environments, writing coverage, and debugging with design engineers through tape-out.

163 000 – 236 000 $

Пеленг

computer-vision opencv pcie systemverilog verilog

FPGA Video Processing Engineer

On-siteCISFull-time

Belarus

ОАО «Пеленг» — ведущее проектно-конструкторское предприятие оптико-электронной промышленности Республики Беларусь. Это более 50 лет инженерных побед и более 3500 специалистов, которые превращают научные исследования в…

FuriosaAI

ai bash pcie perl python +2 skills

Hardware - Design Verification Engineer

APAC

South Korea

About FuriosaAI FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea…

FuriosaAI

ai automation bash ethernet pcie +3 skills

Hardware - Senior Design Verification Engineer

APACSenior

South Korea

About FuriosaAI FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea…

Astera Labs

ai automation ethernet pcie perl +3 skills

Staff / Principal ASIC Design Engineer

MENAPrincipal

Israel

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the…

assembly systemverilog verilog

SENIOR DESIGN ENGR

APACFull-timeSenior

India

Role Overview Design and Verify high-performance, low-power, high-reliability RISC‑V CPU cores for SoCs used in various edge products like automotive, IoT and mobile. Focus on microarchitecture, pipelining, and PPA…

ai automation perl python systemverilog +2 skills

Digital Design Engineer - MCU

EuropeFull-time

Italy

NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio…

ai automation perl python systemverilog +2 skills

Principal Digital Design Engineer - MCU

EuropeFull-timePrincipal

Italy

Principal digital IC design engineer leading the full SOC development flow for NXP's microcontroller (MCU) products in Catania. Day-to-day work covers RTL coding in Verilog/SystemVerilog, synthesis, static timing analysis, formal verification, power analysis, DFT, and post-silicon validation.

61 000 – 83 900 €

ai automation perl python systemverilog +2 skills

Senior Digital Design - MCU

EuropeFull-timeSenior

Italy

Senior digital IC designer on NXP's Catania MCU team, leading the full SoC design flow—RTL coding in Verilog/SystemVerilog, synthesis, static timing analysis, formal verification, DFT, and power analysis using Synopsys/Cadence EDA tools. Collaborates with analog/mixed-signal teams and mentors junior engineers.

50 600 – 69 600 €

NVIDIA

jtag systemverilog verilog

ASIC Design Engineer - RTL and Circuits

APACFull-time

India

ASIC Design Engineer at NVIDIA's Circuit Solutions Group in Bengaluru, defining micro-architecture and RTL for mixed-signal power delivery and management IPs in next-gen GPUs. Works across the full ASIC front-end flow (lint, CDC, synthesis, DFT, LEC, STA) through tape-out with verification, back-end, and firmware teams.

NVIDIA

ai deep-learning express pcie systemverilog

Senior Design Verification Engineer - PCIE

APACFull-timeSenior

Taiwan

Senior verification engineer verifying PCI Express controllers for NVIDIA's next-generation GPUs, SoCs, and DPUs by building reusable UVM/Specman-e testbenches and driving coverage-based constrained-random verification.

Thermo Fisher Scientific

embedded-linux embedded-software ethernet fpga jtag +9 skills

Staff FPGA and Embedded Software Engineer

APACFull-timeStaff

Singapore

Staff FPGA and Embedded Software Engineer owning FPGA firmware and embedded software for flow cytometry instruments at Thermo Fisher Scientific. Sustains legacy Verilog/SystemVerilog FPGA code, designs high-throughput ADC data acquisition pipelines, and integrates firmware with embedded Linux/RTOS/bare-metal systems via I2C, SPI, UART, and Ethernet.

LIFE TECHNOLOGIES HOLDINGS PTE. LTD.

embedded-linux embedded-software ethernet fpga jtag +9 skills

Staff FPGA and Embedded Software Engineer

APACStaff

Singapore

Job Description As part of the Thermo Fisher Scientific team, you’ll discover meaningful work that makes a positive impact on a global scale. Join our colleagues in bringing our Mission to life every single day to…

SPARKGRID PTE. LTD.