Sr. Analog Design Engineer - HBM
Summary
Senior Analog Design Engineer at Micron's High Bandwidth Memory (HBM) team, owning architecture, design, simulation, and silicon bring-up of high-speed analog and mixed-signal circuits for HBM PHYs, including SerDes, PLLs/DLLs/CDRs, and LDOs in advanced-node CMOS.
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
We are seeking a Senior Analog Design Engineer to join our High Bandwidth Memory (HBM) team. This role is responsible for the architecture, design, simulation, and silicon bring‑up of high‑performance analog and mixed‑signal circuits used in HBM PHYs and supporting infrastructure. The ideal candidate has deep expertise in high‑speed I/O, clocking, power management, and advanced‑node analog design, and has successfully delivered silicon to production.
Responsibilities will include, but are not limited to:
Design and own critical HBM analog circuits, including:
High‑speed transmitters and receivers
Clock generation and distribution (PLLs, DLLs, CDRs)
SerDes‑related analog blocks
Biasing, reference, and calibration circuits
Power delivery and regulation circuits (LDOs, regulators)
Develop robust designs that meet bandwidth, jitter, noise, power, and area requirements
Perform detailed pre‑layout and post‑layout simulations
Conduct PVT, Monte Carlo, mismatch, and aging analyses
Work closely with layout engineers to define floorplanning and symmetry requirements, ensure matching, shielding, and EM/IR compliance
Review and sign off on analog layouts
Drive layout‑aware design optimizations for advanced nodes
Define best practices for analog design, documentation, and reuse
Collaborate across analog, digital, system, packaging, and test teams
Minimum Qualifications:
Proficiency with: SPICE‑based simulators (e.g., Spectre, HSPICE), Advanced‑node CMOS technologies
Solid understanding of:
Device physics
Analog layout techniques
PVT variation and reliability concerns
MS in Computer Engineering or related field
5+ years of hands‑on analog or mixed‑signal IC design experience.
Preferred Qualifications:
Deep knowledge of DRAM sub‑system architecture, specification, operation, or design.
Understanding of Physical Layout & Circuit Floor Planning
Excellent Problem‑Solving & Analytical Skills
(LLM)
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