科技職缺

Principal Engineer – ASIC SoC Design

APACFull-timePrincipal

Hewlett Packard Enterprise

Principal Engineer owning end-to-end IP, Subsystem, and SoC design for Micron's next-generation memory and storage products. Day-to-day work spans micro-architecture, Verilog/SystemVerilog RTL design, SoC integration (CDC, lint, synthesis, STA, power analysis), and post-silicon debug, collaborating with global architecture, verification, DFT, and physical design teams.

ai verilog

Senior ASIC Design Engineer

APACFull-timeSenior

cloud ethernet networking verilog

Senior ASIC Design Engineer at HPE in Bengaluru, architecting and implementing high-performance networking ASICs in Verilog RTL, owning micro-architecture/logic design, and collaborating with verification and physical design teams on timing closure.

Teledyne

altium automation cpp embedded-software ethernet +8 skills

Senior Electronic Design Engineer

UKFull-timeSenior

United Kingdom

Be visionary Teledyne Technologies Incorporated provides enabling technologies for industrial growth markets that require advanced technology and high reliability. These markets include aerospace and defense, factory…

RICORE TECHNOLOGY PTE. LTD.

RICORE TECHNOLOGY PTE. LTD.

CPU Digital Front‑end Design Engineer

APAC

Singapore

Job Description: 1. Responsible for micro-architecture design and RTL implementation of high-performance CPU front-end pipeline, including instruction fetch, branch prediction, instruction decode, dispatch and…

systemverilog verilog

ai fpga perl prototyping python +3 skills

GPU Digital Frontend Design Engineer

APAC

Singapore

Design GPU and AI accelerator chips as a digital frontend engineer: define microarchitecture, write synthesizable Verilog/SystemVerilog RTL for modules like SIMD Core and Tensor Core, optimize PPA, and collaborate on UVM verification, synthesis, and post-silicon debug.

BYTEDANCE PTE. LTD.

ai automation express fpga perl +4 skills

SoC Digital Design Engineer, Multimedia Lab

APAC

Singapore

Design SoC architectures and write RTL (Verilog/SystemVerilog) for video codec hardware accelerators in ByteDance's Multimedia Lab, performing PPA evaluation, front-end quality checks (Lint/CDC/RDC), and supporting synthesis, STA, and low-power design.

Blue Origin

SLD Avionics FPGA Engineer III - Lunar Permanence

North AmericaFull-time

fpga git perl python svn +4 skills

FPGA Engineer III at Blue Origin developing HDL for FPGA-based avionics on the Blue Moon lunar lander (HLS/SLD program). Day-to-day work involves RTL design in Verilog/SystemVerilog/VHDL, simulation with ModelSim/QuestaSim, UVM testbench development, timing closure, and design reviews for spaceflight hardware.

130 706 – 182 987 $

Hewlett Packard Enterprise

ASIC Design Engineer 2

North AmericaFull-time

cloud machine-learning networking perl python +1 skills

ASIC Design Engineer 2This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing…

GE Vernova

Lead FPGA Firmware Engineer

APACFull-timeLead

agile fpga git jira perl +6 skills

Job Description Summary The Lead FPGA Firmware Engineer will be working to define requirements, enhance product features for an electronic design for world-class Control & Protection system in VSC and LCC systems,…

On-siteNorth AmericaInternshipSenior

Senior PCIe Bridge Design Verification Engineer

ai azure cloud express generative-ai +3 skills

Senior pre-silicon verification engineer on Microsoft's Compute Silicon team in Redmond, owning verification of PCIe Bridge IP for Azure cloud server chips using UVM, SystemVerilog, and Python-based methodologies with random-stimulus and coverage-driven techniques.

119 800 – 234 700 $

Amd 1

RemoteNorth AmericaSenior

Sr. AI/ML Engineer

agent frameworks ai api development autogen automation +30 skills

Build modular AI agent architectures, RAG pipelines, and LLM-tool integrations to automate hardware design workflows at AMD — covering compiler error resolution, EDA output processing, and knowledge graphs for hardware specs.

On-siteNorth AmericaPrincipal

Principal Silicon Design Verification Engineer

Principal engineer driving functional verification of PCIe IP at block, cluster, and full-chip levels for Microsoft's Azure cloud silicon. Day-to-day work centers on UVM/SystemVerilog testbench development, test planning, regression management, debug, and coverage closure.

azure cloud pcie verilog

188 000 – 304 200 $

On-siteNorth AmericaFull-timePrincipal

Principal Design Verification Engineer

agile ai azure cloud cpp +6 skills

Principal Design Verification Engineer building verification environments and tests for Microsoft's AI accelerator silicon at block, chip, and system level, using SystemVerilog/UVM, Verilog/VHDL, C/C++, and Python. Partners with architecture, design, firmware, and validation teams to drive test plans, coverage closure, and debug of pre- and post-silicon issues.

142 800 – 274 800 $

On-siteNorth AmericaFull-timePrincipal

Principal Subsystem Engineer (Design or DV)

agile ai azure cloud cpp +5 skills

Principal-level engineer leading Design or Design Verification of memory subsystems and high-performance IPs/SoCs for Microsoft's AI silicon, collaborating with architecture, PD, DFT, firmware, and post-silicon teams using Verilog/SystemVerilog, UVM, and AMBA protocols.

188 000 – 304 200 $

Apple

Design Verification Engineer

North AmericaInternship

assembly cpp oop perl python +2 skills

Verification engineer (intern) on Apple's SoC chip team, developing test/coverage plans and test benches in close collaboration with design and micro-architecture teams, working with Verilog, C/C++/assembly, and scripting languages.

Droneshield

agile ai ci-cd cpp embedded-systems +8 skills

FPGA and DSP Team Lead (AU)

On-siteAPACFull-timeLead

Australia

Lead DroneShield's FPGA & DSP Engineering team in Sydney, combining hands-on technical leadership with development of RF detection and defeat products built on SDRs, FPGAs (Verilog/VHDL/SystemVerilog), ARM MPSoCs, and real-time DSP for the counter-drone/defence sector.

FERCHAU GmbH Niederlassung Kassel

cpp embedded-systems fpga networking verilog +1 skills

Entwicklungsingenieur FPGA (m/w/d)

Europe

Germany

Menschen und Technologien zu verbinden, den Perfect Match für unsere Kunden zu gestalten, immer die richtigen Expert:innen für die jeweilige Herausforderung zu finden - das ist unser Anspruch bei FERCHAU und dafür…

Micron Technology

North AmericaFull-timeSenior

Sr Design Verification Engineer, DRAM

agentic-ai ai automation cadence-virtuoso python +1 skills

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…

Intel

SoC Logic Design Engineer

HybridAPACFull-time